Comprehensive Learning

Cover key stages of chip planning, component placement, routing, and verification. The Complete Flow: Navigate the entire Physical Design process, from initial Logic Synthesis to the final GDSII Delivery ready for the foundry.  Core Implementation: Master the essential steps of turning a netlist into a physical layout, including Floorplanning, Placement, Clock Tree Synthesis (CTS), and Routing.   Exhaustive Signoff: Ensure your design is flawless by performing rigorous Static Timing Analysis (STA), Power Analysis, and Signal Integrity checks.

Expert Guidance

Learn from industry professionals with hands-on experience. Tackle Real-World Physics: Learn proven techniques to mitigate deep-submicron manufacturing challenges like the Antenna Effect, Electromigration, and Electrostatic Discharge (ESD). Power Network Design: Gain practical insights into ensuring robust power delivery through detailed Power Integrity and IR Drop Analysis. Timing Closure Strategies: Move beyond theory and learn how to practically manage complex timing constraints, optimize critical paths, and resolve Setup/Hold violations

Career Advancement

Enhance your skills and boost your career prospects. High-Demand Expertise: Acquire the specialized backend engineering skills that semiconductor companies urgently need to bridge the gap between RTL and physical silicon. Tape-Out Readiness: Learn the strict verification standards required for a successful tape-out, including Design Rule Checks (DRC) and Layout vs. Schematic (LVS) validation. Guarantee Functionality: Build confidence in your designs by mastering Logical Equivalence Checking (LEC), ensuring your final netlist behaves exactly like your original RTL with "NO ERRORS"

About the Course

In Physical Design of Digital Integrated Circuits, you will learn how to transform a logical design into a real circuit ready for silicon fabrication, covering key stages such as chip planning, component placement, routing of interconnections, and final verification to ensure proper functionality. Join us and take the first step towards mastering the art of physical design!

Meet Your Instructor

Hi, we are Lombardo and Montaño, your guides in mastering the art of physical design in digital integrated circuits. With years of hands-on experience navigating the complexities of the ASIC design flow, we are excited to share our industry knowledge and help you succeed in this dynamic field. Our goal is to take you step-by-step through the complete physical design process—from initial logic synthesis and floorplanning, all the way to signoff verification and a manufacturing-ready GDSII delivery. We are here to equip you with the exact skills the semiconductor industry demands. Let's embark on this learning journey together.

Course Curriculum

6 Chapters · 40 Lessons

  1. 1
    1. (Included in full purchase)

      Clase 1 - Introducción Parte 1

    2. (Included in full purchase)

      Clase 2 - Introducción Parte 2

    3. (Included in full purchase)

      Introducción a los Circuitos Digitales

    4. (Included in full purchase)

      Clase 5 - Verilog Parte 1

    5. (Included in full purchase)

      Clase 6 - Verilog Parte 2

    6. (Included in full purchase)

      Verilog

    7. (Included in full purchase)

      Clase 6 - Práctica Verilog Parte 1

    8. (Included in full purchase)

      Clase 7 - Práctica Verilog Parte 2

    9. (Included in full purchase)

      Clase 7- Práctica Verilog Parte 3

    10. (Included in full purchase)

      Clase 7 - Práctica Verilog Parte 4

    11. (Included in full purchase)

      Clase 8 - Práctica Verilog Parte 5- Simulación

    12. (Included in full purchase)

      Práctica Verilog

  2. 2
    1. (Included in full purchase)

      Clase 2 -Syntesis Parte 1

    2. (Included in full purchase)

      Clase 3 - Syntesis Parte 2

    3. (Included in full purchase)

      Clase 4 - Syntesis Parte 3

    4. (Included in full purchase)

      Syntesis

    5. (Included in full purchase)

      Clase 5 - Práctica Syntesis Parte 1

    6. (Included in full purchase)

      Clase 8 - Práctica Syntesis Parte 2

    7. (Included in full purchase)

      Práctica Syntesis

  3. 3
    1. (Included in full purchase)

      Clase 9 - Teoría STA

    2. (Included in full purchase)

      STA

    3. (Included in full purchase)

      Clase 10 - Práctica STA Parte 1

    4. (Included in full purchase)

      Clase 14 - Practica STA Parte 2

    5. (Included in full purchase)

      Clase 14 - Práctica STA Parte 3

    6. (Included in full purchase)

      Clase 15 - Práctica STA Parte 4

    7. (Included in full purchase)

      Práctica STA

    8. (Included in full purchase)

      Clase 11 - Potencia Parte 1

    9. (Included in full purchase)

      Clase 12 - Potencia Parte 2

    10. (Included in full purchase)

      Clase 13 - Potencia Parte 3

    11. (Included in full purchase)

      Potencia

    12. (Included in full purchase)

      Clase 15 - Práctica Potencia Parte 1

    13. (Included in full purchase)

      Clase 16 - Práctica Potencia Parte 2

    14. (Included in full purchase)

      Práctica de Potencia

    15. (Included in full purchase)

      Clase 18 - Repaso para el examen

  4. 4
    1. (Included in full purchase)

      Placeholder Slides & Practice

  5. 5
    1. (Included in full purchase)

      Clase 17 - Diseño Físico Digital

    2. (Included in full purchase)

      Diseño Físco Digital

    3. (Included in full purchase)

      Placeholder Práctica Place & Route

  6. 6
    1. (Included in full purchase)

      Signoff

    2. (Included in full purchase)

      Placeholder Práctica de Signoff Verification

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